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[mpeg mp3] video_compression_systems

Description: 根据jpeg标准用verilog语言编写的视频编码器，此编码器可作为一个通用IP使用，完成数字音频/视频的编解码功能-under jpeg standards with the Verilog language video encoder, this encoder can be used as a common IP use, complete digital audio/video codec
Platform: | Size: 222208 | Author: | Hits:

[VHDL-FPGA-Verilog] verilog_jpeg

Description: 用verilog 描写 应用于数字图像压缩系统--jpeg 有测试文档-using Verilog description applied to digital image compression system-- a test jpeg files
Platform: | Size: 9216 | Author: 周信均 | Hits:

[Compress-Decompress algrithms] jpeg_encoder

Description: 完整的jpeg encoder verilog code,DCT部分採用1991 IEEE transection paper,利用skew circular convolution來實現精簡電路-complete jpeg encoder Verilog code, DCT is partly based on the IEEE 1991 transection paper, using skew circular convolutions to achieve streamlining circuit
Platform: | Size: 25600 | Author: 李寧 | Hits:

[Special Effects] djpeg_vlsi

Description: jpeg解码电路，是verilog编写的，可以综合，很有实用价值。-jpeg decoder circuit, is prepared verilog, synthesis, very practical value.
Platform: | Size: 181248 | Author: blueli | Hits:

[Compress-Decompress algrithms] 601792346200732319490634862

Description: jpeg压缩中的DCT蝶型算法verilog代码-jpeg DCT compression algorithm verilog code BUTTERFLY
Platform: | Size: 5120 | Author: wuguanying | Hits:

[Special Effects] DCTofJPEG

Description: 用verilog代码写的JPEG压缩核心模块DCT变换之蝶形单元算法-verilog code written using JPEG compression core module DCT's butterfly modules algorithm
Platform: | Size: 1024 | Author: 叶人杰 | Hits:

[Other] JPEG2000StandardPart1

Description: JPEG 2000 FINAL COMMITTEE DRAFT VERSION 1.0, 16 MARCH 2000
Platform: | Size: 1500160 | Author: 郭顺利 | Hits:

[2D Graphic] jpeg_v

Description: JPEG的Verilog源代码，很有参考价值-JPEG of the Verilog source code, useful reference
Platform: | Size: 222208 | Author: 张伟 | Hits:

[Other Embeded program] fpga-jpeg-verilog

Description: fpga-jpeg-verilog在fpga平台使用verilog语言进行jpeg算法实现-fpga-jpeg-verilog FPGA platform used in the Verilog language Algorithm jpeg
Platform: | Size: 104448 | Author: yang | Hits:

[VHDL-FPGA-Verilog] djpeg.tar

Description: jpeg格式到bmp格式的硬件实现，verilog开发，fpga 实现。-jpeg format to bmp format hardware realize, verilog development, fpga realize.
Platform: | Size: 182272 | Author: 枫叶鹏 | Hits:

[VHDL-FPGA-Verilog] DCT_1D

Description: 一维DCT变换的verilog源码，可用于JPEG算法优化的参考。程序中用到的算法称为“扭卷积”，可参考相关IEEE paper-One-dimensional DCT transform Verilog source code can be used to optimize the JPEG algorithm reference. Procedures used in the algorithm known as the
Platform: | Size: 54272 | Author: 楚天 | Hits:

[ARM-PowerPC-ColdFire-MIPS] jpeg_verilog

Description: JPEG 的解码器，没测试过，手里没有合适的平台-JPEG decoder, not tested, the hands of no suitable platform
Platform: | Size: 80896 | Author: youjia | Hits:

[Picture Viewer] JPEG_Encode_verilog

Description: Verilog源代码，用来实现JPEG的编码-Verilog source code, used for JPEG encoding
Platform: | Size: 104448 | Author: jiang | Hits:

[VHDL-FPGA-Verilog] fpga-jpeg

Description: jepg verilog example
Platform: | Size: 103424 | Author: 展望 | Hits:

[VHDL-FPGA-Verilog] jpeg

Description: JPEG标准下图象压缩的VHDL实现工程，包含文档，原代码及测试代码-JPEG image compression standard of VHDL realization of the project, including documentation, source code and test code
Platform: | Size: 1474560 | Author: 王刚 | Hits:

[Special Effects] JPEGDecoder

Description: JPEG解码器的硬件语言描述，主要的描述语言是verilog,用硬件结构实现了解码功能。-JPEG decoder hardware description language, the main language is described in verilog, with hardware structure realize the decoding capabilities.
Platform: | Size: 199680 | Author: liusu | Hits:

[Other] jpeg

Description: JPEG encoder in Verilog
Platform: | Size: 41984 | Author: megkel | Hits:

[VHDL-FPGA-Verilog] Mars_EP1C6F_Fundermental_demo(Verilog)

Description: FPGA开发板配套Verilog HDL代码。芯片为Mars EP1C6F。是基础实验的源码。包括加法器、减法器、乘法器、多路选择器等。-FPGA development board supporting Verilog HDL code. Chips for the Mars EP1C6F. Are the basic source experiment. Including the adder, subtraction, and multiplier, such as MUX.
Platform: | Size: 1244160 | Author: chenlu | Hits:

[VHDL-FPGA-Verilog] VERILOG-jpeg

Description: 用Verilog语言在FPGA上实现JPEG图片的解码，附带testbench-With the Verilog language in the FPGA to achieve JPEG image decoding, with testbench
Platform: | Size: 103424 | Author: ken | Hits:

[VHDL-FPGA-Verilog] JPEG

Description: JPEG解码(Verilog)源码，详细，高效。-JPEG decoding (Verilog)
Platform: | Size: 188416 | Author: 杨航 | Hits:
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